How do urban planners and builders cope with moving more and more people to cities? There are some things they can do. To begin with, they can physically make the city larger, widening their boundaries to cover surrounding homes so that more homes can be accommodated. They can build houses together, squeezing more single and double-story buildings on each street. At a certain point, however, there is really only one option: You build upwards by building tower blocks that can house hundreds of patches of land that would otherwise fit only a small fraction of that number.
This is, in essence, a similar problem faced by chip designers. Moore’s law states that, every two years, the number of components on an integrated circuit can be cheaply reduced. The power of Moore’s law is undisputed. In 1971, for example, Intel released the 4004, the world’s first commercially available microprocessor, which packed 2,300 transistors on a single chip. By comparison, in 2021, Apple’s A14 processor claims 11.4 brains. One billion Transistor. In that perspective, if the top speed of cars had followed a similar trajectory, modern vehicles would be driving at a speed faster than the speed of light.
Like urban planners, chipmakers have three options available when it comes to delivering next-generation chips: they can make the chips themselves larger to support more components; They can shrink components and pack them more tightly; Or they can build upwards. For the most part, this is the second option that has been pursued. The components have become increasingly smaller, to the point where modern transistors are around a dozen atoms in size and squeezed in proximity, so it is measured in nanometers.
But this cannot go on indefinitely. At some point soon, we will need to rethink the way to make more powerful, next generation chips. Many researchers around the world are currently working on this problem. However, an international team of investigators has a particularly fascinating idea – and involves using the all-around wonder material Graphene to manufacture new transistors unlike any seen today. (Hint: They are the world’s skyscrapers of transistors.)
Graphene wave ride
On a video call, Dey actually performed in 2021, Manoj Tripathi of Britain’s University of Sussex showed me an image. It is a picture of a flat blue surface, which looks like a single wave otherwise rises on a calm plane. If I had no better idea, I could easily believe that Tripathi was an oceanographer. In fact, he is a research fellow at the University’s School of Mathematical and Physical Sciences with a great interest in semiconductors, two-dimensional materials and flexible electronics. His latest project, This One, combines all three.
Graphene is a single layer of graphite, a soft material commonly found in pencil lead, which has a 1-atom-thick (or, perhaps, thin) structure of carbon atoms arranged in a hexagonal, honeycomb-like structure. Graphene is a material of seemingly infinite use. It is one of the strongest materials in the known universe, whose strength is about 100 times that of steel. It is a great superconductor, which allows electric current to flow through zero resistance. Heck, it can also serve as the world’s best sieve, as it is capable of filtering salt or salt from saltwater. He is just scratching the surface.
Tripathi said, “One thing that is very less discussed is that it is very flexible.” “We are targeting him [quality for this project]. What I mean by ‘flexible’ is that you can bend it, you can reduce it, you can do something like that. “Tripathi used it to clean the cloth he has used to clean his computer.
Many materials are, of course, flexible. But the reason Graphene’s flexibility is so exciting is that when wrinkles appear on its surface, it changes the flow of electrons, which in turn changes the electrical properties of the material from point to point. Using a technique referred to as atomic force microscopy, researchers are able to measure the effects of different patterns of wrinkles in graphene. By leaning into these different kinks, which trigger different electrical and mechanical properties, researchers can make very small transistors made of graphene.
This is where multistory building metaphors of factors. “That’s exactly what we’re doing,” Tripathi said. “Chip sizes are decreasing every year, [but] Problem adjusting transistors … What is the solution? We have to use z-axis – multistory buildings to accommodate more number of transistors per unit area. “
Although the height variability would be observable under a microscope, it would be completely invisible to the naked eye. In fact, a transistor made using this technique is about 100 times smaller than a comparable one on a regular silicon chip.
Iron in / out wrinkles
Currently, these are still relatively early stages of the project. There is still much work to be done before this process gets into the actual chips. One problem, for example, concerns the continuity of wrinkles, something that would be correct for chip yield stability.
Researchers have been able to create rows of wrinkles with graphene using patterned molds. However, there are still challenges. Tripathi said, “Wrinkle generation is not a problem.” generation of Company Wrinkles are a problem. “He said a wrinkle is intended to give a vertical height of four nanometers” sometimes eight nanometers, sometimes three nanometers. “
Tripathi said that solving it “is feasible, but we have to think outside the box.” Luckily, “We have a team of eminent scientists [the] UK, USA, Greece, and Italy to help with this. He was confident that the approach could be in the hands of the right people, providing a runway to significantly extend Moore’s law.
“To answer you in one word, I think it is possible,” he said. The researchers aim to get a prototype chip up and running within five years.
A paper describing the work was recently published in the journal ACS Nano.